FMCADDA-104

2-channel 16-bit 370MSPS A/D

2-channel 16-bit 2.5GSPS D/A

Description

The FMCADDA-104 is an analog-to-digital (A/D) and digital-to-analog (D/A) FMC daughter card that provides two 16-bit A/D channels at 370MSPS and two 16-bit D/A channels at 2.5GSPS which can be clocked by an internal clock source (optionally locked to an external reference) or by an externally-supplied sample clock. A trigger input is also available for customized sampling control. The FMCADDA-104 is mechanically and electrically compliant to the FMC standard (ANSI/VITA 57.1-2010). It offers front panel analog I/O access and can be used in a conduction-cooled environment.

The design is based on Texas Instrument's ADC16DX370 dual-channel 16-bit 370MSPS ADC and DAC38J84 quad-channel 16-bit 2.5GSPS DAC. The analog signal inputs are either AC or DC-coupled and connected to MMCX/SSMC coax connectors on the front panel. The FMCADDA-104 allows flexible control of sampling frequency and offset correction through serial communication busses. The card is equipped with power supply and temperature monitoring and offers several power-down modes to switch off unused functions. The FMCADDA-104 is ideal for applications where limited space is available such as RADAR/SONAR, wireless telecommunications, and aerospace test and measurement instruments.

The FMCADDA-104 also features a JESD204B serial interface to provide a simplified high-speed interface between the data converters and the FPGA with a minimum of digital IO on the board. This module therefore delivers high-bandwidth connectivity suited for a wide range of calculation-heavy FPGA-based applications such as beamforming, direction finding, and software-defined radio (SDR).

Features

  • Two-channel, 16-bit A/D up to 370 MSPS

  • Two-channel, 16-bit D/A up to 2.5 GSPS

  • VITA 57.1-2010 compliant

  • JESD204B serial interface

  • Conduction-cooled - Standard Option

  • AC or DC-coupled analog signals

  • 6 SSMC/MMCX front panel connectors

  • Clock source, sampling frequency, and calibration through SPI communication busses

  • Flexible clock tree enables:

    ‣ Internal clock source

    ‣ External sampling or reference clock

  • Power-down modes to switch off unused functions for system power savings

  • Mil-I-46058c Conformal Coating Compliant (optional)

  • HPC - High Pin Count connector

Application

    • Software-defined radio (SDR)

    • Direct RF Down Conversion

    • RADAR/SONAR Electronic Warfare

    • Beamforming

    • Direction finding

    • Ultra Wideband Satellite Digital Receiver

    • Wireless communication transceivers and base stations

    • Medical equipment

    • Aerospace and test measurement instruments